In an advanced information society in recent years, communication apparatuses such as mobile telephones and wireless LANs are required to ensure linearity of transmission signals in wide power amplification ranges, and to operate with reduced power consumption. For such communication apparatuses, transmitter circuits that output highly accurate transmission signals regardless of bandwidths, and that operate with enhanced efficiency are used. Hereinafter, conventional transmitter circuits will be described.
As conventional transmitter circuits, for example, transmitter circuits (hereinafter, referred to as quadrature modulation circuits) that generate transmission signals by using a modulation mode such as the quadrature modulation mode have been known. The quadrature modulation circuits are well-known. Therefore, the description thereof is omitted. Further, as conventional transmitter circuits that operate with higher efficiency than the quadrature modulation circuits, for example, a transmitter circuit 500 shown in FIG. 14 has been known (see, for example, Non-Patent Literature 1). FIG. 14 is a block diagram illustrating a configuration of the conventional transmitter circuit 500 disclosed in Non-Patent Literature 1. In FIG. 14, the conventional transmitter circuit 500 includes a signal generation section 501, a regulator 502, a phase modulation section 503, and an amplifier circuit 504. The amplifier circuit 504 includes a power amplifying section 505, a base bias terminal 509, and a collector terminal 510.
In the conventional transmitter circuit 500, the signal generation section 501 generates an amplitude signal and a phase signal. The amplitude signal is inputted to the regulator 502. The regulator 502 supplies, to the amplifier circuit 504, a voltage based on the inputted amplitude signal. The regulator 502 typically supplies, to the amplifier circuit 504, a voltage proportional to a magnitude of the inputted amplitude signal.
On the other hand, the phase signal is inputted to the phase modulation section 503. The phase modulation section 503 subjects the phase signal to phase modulation, to output a phase-modulated signal. The amplifier circuit 504 amplifies the phase-modulated signal having been inputted from the phase modulation section 503, according to the voltage supplied from the regulator 502, to output a resultant signal as a modulated signal. The modulated signal is outputted as a transmission signal from an output terminal. The transmitter circuit 500 as described above is called a polar transmitter circuit.
Next, the amplifier circuit 504 will be described in detail. In the amplifier circuit 504, the power amplifying section 505 includes an amplifying transistor 506, a bias circuit 507, an adder 508, and the like. In the amplifier circuit 504, a DC voltage having a predetermined magnitude is supplied as a bias voltage Vbias to the base bias terminal 509. Further, a voltage based on the amplitude signal is supplied as a collector voltage Vcc to the collector terminal 510 from the regulator 502.
To the adder 508, the phase-modulated signal is inputted from the phase modulation section 503, and the bias voltage Vbias is inputted via the bias circuit 507. The adder 508 adds the bias voltage Vbias to the phase-modulated signal, to output a resultant signal to the amplifying transistor 506. The amplifying transistor 506 amplifies the phase-modulated signal inputted via the adder 508, to output a resultant signal as a transmission signal through the output terminal.
Thus, in the conventional transmitter circuit 500, the bias voltage Vbias is supplied to the base bias terminal 509 for the power amplifying section 505, and the regulator 502 controls the collector voltage Vcc for the power amplifying section 505 according to the voltage based on the amplitude signal, thereby controlling an output power level.
Further, as a conventional transmitter circuit that controls a collector voltage Vcc (or a drain voltage) for the power amplifying section to control an output power level, a transmitter circuit 600 as shown in FIG. 15 is suggested (see, for example, Patent Literature 1). FIG. 15 is a block diagram illustrating a configuration of the conventional transmitter circuit 600. In FIG. 15, the transmitter circuit 600 mainly includes an amplitude-phase separation section 621, a power-source voltage control section 622, a bias voltage source 623, a power amplifying section 624, a coupler 625, a comparator 626, a switch SW1, and a switch SW2. The power amplifying section 624 includes power-amplifying FETs 6241 to 6243, and a bias circuit 6244.
The transmitter circuit 600 operates by switching between the GSMK (Gaussian filtered Minimum Shift Keying) mode and the EDGE (Enhanced Data Rates for GMS Evolution) mode, according to a mode signal MODE. Specifically, the switch SW1 and the switch SW2 are each switched according to the mode signal MODE so as to be connected to the (GSMK) side in a case where operation is to be performed in the GSMK mode, and connected to the (EDGE) side in a case where operation is to be performed in the EDGE mode.
In the operation according to the GSMK mode, the power-source voltage control section 622 controls a drain voltage Vdd to be supplied to the power-amplifying FETs 6241 to 6243, according to a power level control signal VPL. The bias voltage source 623 generates a bias voltage Vbias based on the drain voltage Vdd controlled by the power-source voltage control section 622. The bias circuit 6244 supplies a gate bias voltage based on the bias voltage Vbias, to gate terminals of the power-amplifying FETs 6241 to 6243.
In the operation according to the EDGE mode, the power-source voltage control section 622 controls the drain voltage Vdd to be supplied to the power-amplifying FETs 6241 to 6243, according to a signal LOD which is indicative of amplitude information of a transmission signal transmitted from the comparator 626. The phase-amplitude separator circuit 621 separates a communication signal into an amplitude signal Vin and a phase signal Pin. The comparator 626 compares the amplitude signal Vin from the phase-amplitude separator circuit 621, with a detection signal Vdt from the coupler 625 which is provided on the output side of the power amplifying section 624 for detecting an output level, to output a signal based on a difference in potential therebetween. The output from the coupler 625 is frequency-converted by a mixer MIX, and supplied as the detection signal Vdt to the comparator 626 via a filter FLT and an amplifier AMP.
Thus, in the conventional transmitter circuit 600, the gate bias voltage is supplied to the gate terminal of the power amplifying section 624, and the power-source voltage control section 622 controls the drain voltage Vdd for the power amplifying section 624, to control an output power level.